Implementation of Low-Memory Reference FFT on Digital Signal Processor
Yi-Pin Hsu and Shin-Yu Lin
DOI : 10.3844/jcssp.2008.545.549
Journal of Computer Science
Volume 4, Issue 7
Problem statement: In order to improve and implement Fast Fourier Transform (FFT), in general, an efficient parallel form in digital signal processor is necessary. The butterfly structure is an important role in FFT, because its symmetry form is suitable for hardware implementation. Although it can perform a symmetric structure, the performance will be reduced under the data-dependent flow characteristic. Even though recent research which calls as Novel Memory Reference Reduction Methods (NMRRM) for FFT focus on reduce memory reference in twiddle factor, the data-dependent property still exists. Approach:In this study, we propose an approach for FFT implementation on DSP from analog device company (ADI) which is based on data-independent property and still hold the property of low-memory reference. We have applied the proposed method of radix-2 FFT algorithm in low-memory reference on ADI BlackFin561 DSP. Results: Experimental results show the method can reduce 44.36% clock cycles comparing with the NMRRM FFT implementation and keep the low-memory reference property. Conclusions/Recommendations: From our algorithm, the results can be accepted and realized for DSP-based embedded system. In further, we will try to implement on different DSP-based system in order to improve the algorithm values.
© 2008 Yi-Pin Hsu and Shin-Yu Lin. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.