American Journal of Applied Sciences


B. Sargunam and R. Dhanasekaran

DOI : 10.3844/ajassp.2014.137.144

American Journal of Applied Sciences

Volume 11, Issue 1

Pages 137-144


Finite field multipliers are widely used in the field of cryptography for the purpose of scalar multiplication. The outputs of the finite field multipliers may consist of errors due to certain natural radiations which further leads to the failure of the cryptosystems. Here two Concurrent Error Detection (CED) schemes namely time redundancy and modular inversion based error detection schemes for finite field multipliers are discussed. The CED techniques have been implemented for bit serial, digit serial and bit parallel Montgomery multipliers. The Simulation results are obtained using Modelsim10.0b, area and power analysis has been performed using Xilinx ISE 9.1i. The proposed modular inversion based CED scheme is found to be area and power efficient compared to existing time redundancy based CED scheme.


© 2014 B. Sargunam and R. Dhanasekaran. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.