American Journal of Applied Sciences

Framework for Managing the Very Large Scale Integration Design Process

Sabah Al-Fedaghi and Eman Al-Dwaisan

DOI : 10.3844/ajassp.2012.213.222

American Journal of Applied Sciences

Volume 9, Issue 2

Pages 213-222


Problem statement: The VLSI design cycle was described in terms of successive states and substages; it starts with system specification and ends with packaging. At the next descriptive level, currently known methodologies (e.g., flowchart based, object-oriented based) lack a global conceptual representation suitable for managing the VLSI design process. Technical details were intermixed with tool-dependent and implementation issues such as control flow and data structure. It was important to fill the gap between these two levels of description because VLSI chip manufacturing was a complex management project and providing a conceptual detailed depiction of the design process would assist in managing operations on the great number of generated artifacts. Approach: This study introduces a conceptual framework representing flows and transformations of various descriptions (e.g., circuits, technical sketches) to be used as a tracking apparatus for directing traffic during the VLSI design process. The proposed methodology views a description as an integral element of a process, called a flow system, constructed from six generic operations and designed to "handle" descriptions. It draws maps of flows of representations (called flowthings) that run through the design flow. These flowthings are created, transformed (processed), transferred, released and received by various functions along the design flow at different levels (a hierarchy). The resultant conceptual framework can be used to support designers with computer-aided tools to organize and manage chains of tasks. Results: The proposed model for managing the VLSI design process was characterized by being conceptual (no technical or implementation details) and can be uniformly applied at different levels of design and to various kinds of artifacts. The methodology is applied to describe the VLSI physical design stage that includes partitioning, floorplanning and placement, routing, compaction and extraction and verification. Conclusion: The resultant conceptual picture demonstrates a viable description method that can be adapted for different stages and used in developing systems for managing the VLSI design process.


© 2012 Sabah Al-Fedaghi and Eman Al-Dwaisan. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.