A Novel Architecture of Maximum Power Point Tracking for Ultra-Low-Power Based Hybrid Energy Harvester in Ubiquitous Devices: A Review
- 1 Tunku Abdul Rahman University College (TAR UC), Malaysia
- 2 Universiti Kebangsaan Malaysia (UKM), Malaysia
Copyright: © 2020 Michelle Lim Sern Mi, Sawal Hamid Muhammad Ali and Md Shabiul Islam. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
This research work presents a novel architecture of an Ultra-Low-Power (ULP) based Hybrid Energy Harvester (HEH) consisting of multiple input sources such as kinetic, thermal and solar energy, harvested from passive human power. Having multiple ambient sources mitigates limitations caused by single sources especially for bodily-worn applications; however, this results in impedance mismatch among the different integrated sources. To overcome this limitation, the proposed ULP-HEH will use one power management unit with Maximum Power Point Tracking (MPPT) algorithm and impedance matching considerations to efficiently manage and combine power harvested from all three sources to achieve ULP consumptions. Among other crucial sub-modules of the ULP-HEH are its Asynchronous Finite State Machine (AFSM) cum resource sharing arbiter to prioritize and share energy sources for overall power reduction, an efficient rectification scheme for the piezoelectric input, an adaptive feedback for ULP conditioning, Zero-Current Switching (ZCS) for semi-lossless switching, a self-start circuit for low ambient startup, a Boost converter, a Buck regulator, a fuzzy-based micro-battery charger and a de-multiplexer to switch between harvesting or charging capabilities. All of which are implemented for maximum output extraction and minimal losses. This ULP-HEH will be developed in PSPICE software, Verilog coding under Mentor Graphics environment and later to be verified using Field Programmable Gate Array (FPGA) board before the final layout implementation in CMOS 0.13-µm process technology. This battery-less ULP-HEH is expected to deliver 3.0-5.0V of regulated voltage output from low ambient sources of 35 mV at startup. An efficiency of 90% with an output power of 650 µm is expected when all sources are summed. Also, this ULP-HEH is aimed at reducing power consumption to at least twice (<70 µW) of conventional approaches. The proposed ULP-HEH can be used for ULP bodily-worn electrical gadgets, wearable biomedical devices or to charge micro-batteries for portable electronic devices.
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- Hybrid Energy Harvester (HEH)
- Ultra Low Power (ULP)
- Maximum Power Point Tracking (MPPT)
- Resource Sharing Arbiter