A Novel Exploitation of Errors in Redundant Residue Number System Architecture

: Residue Number System (RNS) is an unweighted number system that symbolizes big integers with smaller numbers. It can perform operations in particular addition and multiplication in parallel. Because of this property, RNS is extensively used in communication, Finite Impulse Response (FIR), cryptography and signal processing devices. The transfer of data in digital channels is very important for some critical applications where accuracy is very important. In this study, we proposed a novel algorithm that is premised on the Hamming Distance (HD) and one of the reverse conversion methods, which is, the Chinese Remainder Theorem (CRT) and) as a joint technique for the detection and correction of multiple bit errors in RNS. The proposed algorithm provides a more efficient technique that improves on the hardware size and increases the processing speed with fewer iterations when compared with other state-of-the-art schemes. The work analyses the area and delay of the hardware architecture and compared with other similar schemes. The results indicated the effectiveness of our proposed scheme in terms of the area and delay specifications.


Introduction
In this era of technology, a good number of errorcontrol methods are developed to ensure the efficient, fast and reliable transfer of non-erroneous data in modern digital systems such as digital processors and arithmetic units. An identifiable challenge in the transfer of data is caused by noise that can result in an error(s) in a transmission channel (Afriyie and Daabo, 2018a). Fault tolerance is, therefore, needful to be able to allow faulty channels to continue to operate through error detection and correction mechanisms (Afriyie and Daabo, 2018b) the concept of fault tolerance regarding security in transmission channels cannot be left unattended. There are three main concepts of information security namely confidentiality, integrity and availability. Faults can be classified as transient where error happens for a very short moment. With intermittent faults, it appears repeatedly for a specific period and permanent faults however can only be prevented when the parts that have affected transmission channels need to be replaced (Jonsson, 1996).
Error-correcting codes in RNS are attractive because of their inherent features. RNS provides the speed of arithmetic computations because of its unweighted and unparalleled characteristics compared to the conventional number systems. Residue Number System (RNS) is a non-positional, unweighted number system that does not spread error from one residual digit to the other (Daabo and Gbolagade, 2014). Over the past decade, RNS has received and continues to receive considerable attention in digital systems such as image processing, cryptography and digital filtering. The reason for its widespread is its notable properties for instance modularity, fault tolerance, parallelism and its carry-free operations (Beame et al., 1986;Leighton, 1992;Taylor, 1984;Soderstrand et al., 1986). Several works proposed by scholars in error detection and correction in RNS have been done on single and multiple error detection and correction schemes. Several works in the existing literature on the detection and correction of errors are based on the traditional Chinese Remainder Theorem (CRT) and the Mixed Radix Conversion (MRC) (Wang, 1998;2000). There are two most important issues for the residue arithmetic in RNS, which include the selection of the moduli set and lastly the conversion of the residue digits to binary numbers. An RNS is based on the traditional moduli set {2 n -1, 2 n , 2 n , +1} has become popular that is expected to play a very good role in RNS digital processing (Ashur et al., 1995).

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A number of conversion schemes for {2 n -1, 2 n , 2 n , +1} have been done in (Jenkins, 1978;Taylor and Ramnarynan, 1981;Andraos and Ahmad, 1988;Ibrahim and Saloum, 1988;Vinnakota and Rao, 1994;Piestrak, 1995;Bhardwaj et al., 1998;Conway and Nelson, 1999). Yau and Liu (1973) developed an algorithm that detected and corrected single and burst error respectively in Redundant Residue Number System (RRNS). However, their algorithm requires no look-up tables. The hardware implementation of that proposed algorithm had memory space that was faster than the algorithm proposed in earlier works. A similar algorithm that is based on the CRT presented by (Goh and Siddiqui, 2008) detects and corrects multiple bit errors in RRNS The integrity and reliability of data have major special effects on the performance of any data in any transmission line. Factors such as noises and disturbances can also affect transmission lines by reducing the reliability of the data. With the provision of the desired fault tolerance, a system will continue to perform its desired functions. Figure 1 shows the structure of Encoder in error detection and correction proposed by (Olatunde et al., 2016).
There are two (2) main principles of improving the reliability of Computing Systems (CS) that is resident in the positional number systems through: (1) Increasing the reliability of individual elements of the CS and (2) introducing different types of redundancy (Tay and Chang, 2017;Phalakarn and Surarerks, 2018). It evident that introducing redundancy when applying available elements is the surest way in increasing the reliability of CS. The existence of fault tolerant features in the computing systems helps to increase the reliability of the CS. The existence of fault tolerant features of the CS can be achieved as a result of the application of two main methods namely the Active Fault Tolerance (AFT) and the Passive Fault Tolerant (PFT). Some studies done by (Yatskiv and Tsavolyk, 2017;Krasnobaev et al., 2019) indicate the use of PFT technique that helps in the improvement of reliability in CS that is widely used in positional number systems. There is however lack of studies conducted using residue classes in achieving fault tolerance and also improving the reliability of CS that is based on the application of AFT. The main goal of this study is to propose the design of effective fault tolerant structure using residue classes to detect and correct multiple bit errors by applying the AFT technique. Begli et al. (2019) proposed a framework that detects attacks by employing machine learning techniques and Support Vector Machines (SVM). Their findings showed the efficiency of the proposed framework in detecting faults in critical infrastructures.

Fundamentals of Residue Arithmetics
Residue Number System is characterized by a set of k pairwise relatively prime positive integers, i.e. the greatest common divisor gcd (mi, mt) = 1 with i j, m1, m2… mk-1, mk called the moduli, that is formed in increasing, i.e., m1 < m2 <… mk-1 < mk (Afriyie and Daabo, 2018a). Their products represent the interval [0, M) referred to as the legitimate range that defines the useful computational range of the number system, that is:

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In representing signed numbers in RNS, the dynamic range is defined as [-(M-1)/2, (M-1)/2] if M is odd and M/2 if M is even. Every natural integer X, in the legitimate range, can be represented by a set of residues r1, r2,…rk-1, rk where: |X |mi represents X modulo mi with iϵ [1, m]. RNS has a carry-free feature that works on addition, subtraction and multiplication operations. These operations can be achieved independently in RNS concerning the moduli. As a result of the carry-free property of RNS, the three operations specifically addition, subtraction and multiplication are possible to be performed concerning the moduli i.e.: Hence, * indicates the basic operations. As a result, RNS can provide fast arithmetic.
In achieving redundancy for the reason of detecting errors in digital channels, redundant moduli are added to the existing moduli as spare. By adding (u-w) redundant moduli (mn+1, mn+2,… mn) to the v information moduli (m1, m2, m3,…mn), an RRNS (u, w) code is possible to be generated. The process of achieving this is called RRNS encoding. An integer S can be represented in the RRNS form as: where, (m1, m2, m3,…mn) are known as the information moduli and (mw+1, mw+2, mw+3… mw) indicating the redundant moduli set. Similarly, the residues, (r1, r2,…r3, rw) show the information residues and (rw+1, rw+2, rw+3… rw) are called the redundant residues.
In the process of decoding in RRNS, if some of the spare residues are not used, an integer can be correctly recovered if the existing residue digits are without errors. For RRNS, all moduli are pairwise relatively prime and the representation of this system is equal to: RRNS, (u-w, v) code has a detection capability of (uw-v) errors and an error correction capability of (u-wv)/2[. The code rate of an RRNS is defined as: where,  where (j = 1, 2, 3,…u) are the moduli. During the transfer of data, the number of extra bits and the code rate for error detection and correction can be varied. The spare moduli are added to the information bits. This, therefore, affects the code rate by decreasing it and the error correction capability is enhanced. In RNS, the number of non-zero elements in a vector is defined as its hamming weight. Let Ki and Kj be codevectors, then the hamming distance d(Ki, Kj) is defined as the number of bits in which two codevectors Kj and Kj differ. HD is the minimum of the hamming distances: ; .

Theorem 3
The minimum distance of an RRNS code is dmin, if and only if the product of redundant moduli satisfies these relations:

Theorem 4
An RRNS code y that is premised on an extra RNS has a minimum hamming weight wtmin   + 1 and a minimum distance dmin = r + 1.

Theorem 5
For an extra moduli bit in RNS, the error detection capability cd, cd = d-1 and the error correction capability where, x is the largest integer value smaller than x (Ashur et al., 1995). That is, RRNS (u, w) code can detect up to (u-w) residue digits and correct up to 2 uw t      residual digits. This implies that single and multiple error detection and correction algorithms are possible to be implemented when u and w are carefully selected. This paper focuses on detecting and correcting multiple bit errors in RRNS with (u-w = 2).
It is important to determine the optimal set {mo}OPT of modules from the set of the possible respective moduli set mn+1, mn+2, mn+3,…, mn+k at which the reliability of the CS R (n/k) RC(t) of the CS will be maximum. In achieving the optimality of the moduli set {mo}OPTs, it is important to frame and solve the problem of inverse of the optimal reservation in the residues. The inverse optimal reservation problem in the residues is mathematically formulated as (Ushakov, 2013): where, c is the maximum possible number of control bases indicates the optimal control bases. In ensuring the possibility of maximum reliability value computing system in RC. With this, the condition that is set must be achieved:

Conversion
The MRC and CRT are the main approaches that are mainly used in conversion processing (Sun and Krishna, 1992). This study will be limited to the CRT and the HD techniques because the CRT offers the real-time signal processing time as a result of its parallel means of conversion and there is a constant limit to this approach (Soderstrand et al., 1986). The process of converting from conventional representations to RNS is known as forward conversion whilst converting from the RNS to the conventional representations is known as the reverse conversion.
The residue to conventional number representation is done mainly by the MRC or the CRT (James and Pa, 2015); To compute numbers X from its corresponding residues, the CRT technique can be used which is given in Eq. (11): where: This research paper provides an efficient and novel algorithm for the detection and correction of multiple bit errors for the moduli set {2 n -1, 2 n , 2 n +1, 2 n+1 -1, 2 2n -3, 2 n2 +1}.
The rest of the paper is arranged as follows: The section 2 provides the review of related works on RNS and RRNS. Section 3 gives the proposed scheme demonstrated theoretically. In section 4, the performance evaluation is done and tested against state-of-the-art schemes. In section 5, the paper is concluded.

Proposed Method
This part of the paper presents a new scheme for detecting and correcting multiple bit errors in RRNS in the stated moduli set.

Proposed Algorithm
The proposed method is based on the algorithm outlined given below: Using the CRT, it is possible to compute for the original integer message as a way of recovering it from the set of residues received. Hence, to recover the original integer message involves only the modulo operations for some iterations. The algorithm is premised on the CRT and the HD.
The multiplicative inverses for the CRT based on the same moduli set are computed as follows: Equations (15) -(23) project the formulations using the CRT in detecting the affected integer message. This study purposely employs the CRT for implementation of the hardware architecture. Generally, the CRT is specified usually as.
For the values n1 to n6, for the moduli set, S = {2 n -1, 2 n , 2 n +1, 2 n+1 -1, 2 2n -3, 2 2n +1} gives: Based on the proposed algorithm, the amount of parts for the duplicate CS in the positional number system can be determined by the mathematical expression in equation: For the triple CS, it can also be mathematically expressed as: Equations (25) and (26) can generally be expressed as: The probability of the fault tolerant activity of the CS can be obtained on the residues from Eq. (27).

Hardware Implementation
In implementation of the hardware, the considered moduli set S = {2 n -1, 2 n } for the hardware architecture for the non-redundant component is considered. The corresponding binary representation of the residues have a bit level representation as x1 and x2 which further give: The correct integer message for the non-redundant part that is, X12 is known from the Eq. (38) when any of the residue digits have errors in the non-redundant part.

Results
The architectural area of the proposed method is built from the stated moduli set using Carry Propagate Adders (CPAs) and simple adders. To detect and correct multiple bit errors in RNS, the residues are converted to a correct integer message using the traditional CRT and the HD as a joint. In a situation where an error occurs during data transmission in digital lines, the redundant part is called to aid in detecting and correcting residue errors that are premised on the proposed algorithm presented in this study. The erroneous residue digits are calculated about Eq. (8). The schematic architecture as shown in Fig. 2 depicts that there are three regular Carry Propagate Adders (CPAs), that are needed to build the architecture with a bit length of (8n bite) as regards to the delay for the proposed schematic architecture, the CPAs execute a computational speed of DFA for of the CPAs each and need a total architecture size of (8n) FA. The proposed architecture needs a total area of (2n+2) DFA. The schematic diagram for the proposed method is shown in Fig. 2

Discussion of Results
In this section, we present the analysis of the results proposed in this work against other existing state-of-the-art works. Tables 2 and 3 show the proposed algorithm with the other existing algorithms based on the area and delay of the architecture.

Numerical Results
We can now illustrate some numerical examples for the new method in this study.
Considering an RNS code (n, k) where n indicates the length of the code and k represents the dimension of the RNS code with the moduli set (m1, m2, m3, m4, m5, m6) = (3,4,5,7,13,17) where, m1 and m2 are nonredundant moduli, m3, m4, m5 and m6 are the redundant moduli. For instance, considering the integer message y = 11, for its residue digits, are yi = (2, 3, 1, 4, 11, 17). The range of legitimacy = ML = 3*4 = 12 and the illegitimate range = M1 = 5*7*13*17 = 7735. Let us accept that in the process of calculation of the integer message, the second and sixth residues are in error respectively, i.e., two errors (t = 2). These residues in error have propagated into y during transfer in the digital channels using A1 = 2 and B2 = 6 as error locations. The codevector after the computation of the computation using the CRT gives, From the above results, it is observed that whenever y2 and y6 are used in the computation they give an illegitimate integer and also lies outside the legitimate range namely X1234, X1235, X1245, X2345, X1236, X1246, X1346, X2346, X1256, X1356, X2356, X1456, X2456, X2456 and X3456. Whenever the residue digits y2 and y6 were dropped in the computation of X1345, the integer message recovered is 11 and also lies within the legitimate range.
The legitimate integers are y2 and y6 are the residue digits in error. It can be concluded that, the correct integer value is 11 and there were errors in y2 and y6. The integer values y2 and y6 can be corrected by computing y2 = 11mod4 = 3 and y6 and y6 = 11mod17 = 11. Table 1 shows the HD between any two codevectors that are computed based on theorem 5 of the HD theorems from the paper. From the comparison involving the residue vectors and the Hamming Distances, the only value that lies in the legitimate range and has a Hamming Distance d(ri, y) which is less than or equal to 2 i.e., (t  2) is 11. This indicates that the proposed algorithm has detected and corrected the transmitted integer message correctly. The proposed technique is simple and provides an efficient way, which makes the integer message, recovered avoiding the use of large integers.
The paper presented a novel and simple scheme that detects and corrects multiple bit errors in RRNS architecture. For the evaluation of the proposed technique, it is compared to known best-known stateof-the-art schemes that also work on errors in RNS. The paper-based on the proposed algorithm provides a faster encoding and decoding schemes because of the generalized moduli set. The generalized moduli set provides an efficient Dynamic Range. The theoretical analysis performed between the proposed and other known schemes indicated that the proposed technique had improved hardware architecture for the area and provided a faster processing speed. The proposed method presented an area of (8n) FA a processing speed of (2n+2)DFA. The architecture of the proposed work uses simple adders and Carry Propagate Adders (CPAs) which presents the simple architecture and fewer hardware resources. The scheme proposed has a faster processing speed and computing time than the other schemes used in this study for different values of n. When n it becomes large in all schemes, the proposed scheme tends to be simpler and has less delay than the other schemes. The resulting outputs are shown in Figs. 2 and 3 respectively. Figures 3 and 4 show the performance comparison of the area and delay schemes of the proposed scheme with other known schemes. Figure 3 presents the area of the hardware architecture for the proposed scheme and other known methods used for comparison. With an increasing value of n in all schemes, the proposed scheme gets better hardware size. In Fig. 4, the delay of both the proposed and similar known schemes are compared. It can be realized that our proposed method 103 requires less memory in detecting and correcting multiple bits' errors. The other known schemes used in this study present high memory that reduces the computational or processing speed for implementation.      Afriyie and Daabo (2018b) 11n +4 10n +7 Pontarelli et al. (2008) 12n +12 24n +20 Aremu and Gbolagade (2016) 12n +1 9n +2 Proposed 8n 2n +2

Conclusion
In conclusion, this work has presented a novel and simple algorithm that has the capability in detecting and correcting multiple bit errors in RRNS architecture. The proposed method was compared to other existing literature in RRNS for the detection and correction of errors in digital channels. The existing schemes compared in this study provide complex and time-consuming algorithms. The realization was that, the proposed method considerably performs better and requires fewer bits than the other schemes used for comparison in this study. The proposed algorithm provides fewer iterations in the decoding and encoding process that reduces the cost of redundant moduli and high-speed elementary RNS operations. The proposed scheme incorporated the traditional CRT and the HD as a joint technique that simplified the hardware design and improved the processing speed as compared with other similar known schemes in RRNS. For the proposed algorithm, detecting and correcting multiple bit errors are only possible, however, overflow and sign detections seem to be more difficult. Some prior studies have shown that the use of AFT also known as the dynamic reservation technique in residues presents high reliability in CS than the PFT technique.
For future work, the concentration of detection and correction of errors will be premised on optimization techniques to reduce the iteration steps to enhance the speed of the algorithm. Besides, a simple algorithm premised on the new CRT II for some special moduli set will be considered for both forward and reverse conversions to enhance the computational speed for detecting and correcting errors in RNS.