TY  - JOUR
AU  - Saravanan, K. 
AU  - Suresh, R. M. 
PY  - 2012
TI  - Buffer Pocketing and Pre-Checking on Buffer Utilization
JF  - Journal of Computer Science
VL  - 8
IS  - 6
DO  - 10.3844/jcssp.2012.987.993
UR  - https://thescipub.com/abstract/jcssp.2012.987.993
AB  - Problem statement: In this study, the paper proposes the development of Effective Buffer Utilization on Adaptive Router with Buffer Pocketing and Pre-Buffer Checking Technique. Network-on-Chip could be prepared more capable by tricky faster routers. By using improved buffers, superior number of ports and channels, adaptive routing, all of which acquire key of overheads in hardware costs. Approach: This technique will improve communication efficiency without increasing the buffer size with support of input buffer space feedback controller in an input channel. A Buffer-Pocketing system enables the input channels to use the unused buffer from another channel at runtime that have not enough buffer space to utilize as per the input flits. The current buffer status in a router could be updated on each cycle of data flits transmitted to buffer space controller with the help of Router Monitor Sensor (RMS). Results: Implementation results of the proposed design for a 64-bit 4 input-buffer router show a reduction of the average packet transmission latency and an increase of the average transmission flits. The results show that the proposed design can reduce the cycles required for transmitting a fixed number of packets, when compared to that without buffer stealing. Conclusion: The study confirmed that the pre-buffer checking and feedback collecting from the router design take the place of the original design in terms of both throughput and latency. Thus, BS is more robust in handling hardware overhead ratio.