@article {10.3844/ajassp.2009.1521.1525,
article_type = {journal},
title = {Design of Multi-Valued Quaternary Based Analog-to-Digital Converter},
author = {Alam, A.H.M. Zahirul and Lawal, Wahab Adetunji and Khan, Sheroz and Rashid, Muhammad Mahbubur},
volume = {6},
year = {2009},
month = {Aug},
pages = {1521-1525},
doi = {10.3844/ajassp.2009.1521.1525},
url = {https://thescipub.com/abstract/ajassp.2009.1521.1525},
abstract = {Problem statement: The design of multi-valued quaternary based Analog-to-Digital Converter (ADC) circuit was presented. The ADC generates multi-valued logic outputs rather than the conventional binary output system to overall reduction in circuit complexity and size. Approach: Design was implemented using pipeline ADC architecture and was simulated using model parameters based on standard 0.13 µm CMOS process. Results: Performance analysis of the design showed desirable performance parameters in terms of response, low power consumption, and a sampling rate of 10 MHz at a supply voltage of 1.3V was achieved. Conclusion/Recommendations: The ADC design was suitable for the needs of mixed-signal integrated circuit design and can be implemented as a conversion circuit for systems based on multiple-valued logic design. },
journal = {American Journal of Applied Sciences},
publisher = {Science Publications}
}