Automatic Calibration of Frequency Compensation System in Computer-Controlled Patch-Clamp Amplifier

Computer-controlled patch-clamp amplifier is a digitally controlled analog device used to record the cellular ion channel currents in electrophysiology research. The inherent bandwidth and performance of the headstage is limited by the stray capacitance and distributed capacitance across the feedback resistors. In order to effectively improve the performance of the headstage, the paper advanced a simplified automatic calibration method of frequency compensation system in resistor-feedback patch-clamp amplifier. The dynamic model of headstage was approximate as a two poles and one zero system in the transfer function by experience and test results, so the dynamic characteristics of the headstage were obtained employing least squares parameter estimation algorithm. Further more, the compensation parameter of high frequency booster can be estimated by the time constant of main pole of headstage. And automatic adjustment of the parameters in transient response correction stage was performed as a least squares fitting problem. The software routine running on the host computer conducted all operations of frequency compensation. Experimental results demonstrate that the simplified automatic calibration method can substantially extend the bandwidth and minimize step response error of headstage.


INTRODUCTION
Patch-clamp amplifier can be used to record the single-channel and whole cell currents in electrophysiology research [1,2] . It is fundamentally a sensitive current-to-voltage converter, converting small (picoampere to nanoampere) cellular ion channels currents into voltage signals that can be observed with oscilloscope or sampled by data acquisition (DAQ) [3,4] .
Compared to the conventional patch-clamp amplifier, computer-controlled patch-clamp system implemented digital control of all functions and adjustable parameters in the amplifier circuitry through the software running on the host computer. Further more, mode switching, capacitive transient cancellation, series resistance compensation and a number of other operations are automated. The digital control of the analog circuitry is mainly performed through multiplying digital-to-analog converters (mDACs) and analog switch devices. In the amplifier circuitry, mDACs perform as variable resistors replacing potentiometers and analog switch devices replace conventional ones [5,6] .
Parasitic capacitance across the feedback resistors in the headstage introduces non-ideal frequency characteristics that must be compensated for and frequency compensation system was developed to do it. In conventional patch-clamp amplifier, the potentiometers in the frequency compensation stage were adjusted manually to correct the frequency response, which is a time-consuming process. So Sigworth had advanced an automatic calibration method to perform the adjustment of the frequency compensation system [7] . Here we used a simplified automatic calibration method to perform adjustment of the frequency compensation system on the basis of the approximate dynamic model of headstage and Sigworth's work.

System overview:
The new computer-controlled patchclamp system PC3 was researched and designed by amplifier. Operation amplifier A1 is configured as a current-to-voltage converter. Differential amplifier A2 subtracts V cmd from the output of A1 to generate a voltage that is purely proportional to the voltage across R f . (B) The dynamic characteristic model of resistive headstage institute of biophysics and biochemistry of Huazhong University of science and technology. The system consists of a headstage amplifier, patch-clamp amplifier main unit, data acquisition interface and personal computer (Fig. 1). The patch-clamp amplifier contains no processor in itself, but relies on data acquisition and control software running on the host computer, which provides the initialization, control, calibration and testing of its analog functions. For the reason of the asynchronism of the A/D and D/A on common DAQs, we have designed a novel USB2.0-based DAQ, in which four 12-bit DAC channels, eight 333 kHz 12-bit ADC channels and a serial interface are provided. Two DAC channels are dedicated to providing stimulus voltages and test signals and two ADC channels are dedicated to sampling the current monitor signals and the measure points' output signals from the internal multiplexer. The reminding DAC and ADC channels are left free for other uses. The serial interface in DAQ is designed to transfer the control codes from the software running on the host computer to the control and interface unit in PC3. Then control and interface unit decodes the serial data and controls the analog switches and mDACs by the programmable logic device. The stimulus and compensation stage of patch-clamp amplifier scales the command voltages and injects the currents used for the capacitance transient cancellation and series resistances compensation. The signal-conditioning unit (including frequency compensation system) reconstructs the output of headstage and formats the signal into the form required by DAQ.
To allow for automatic calibration and testing of the circuitry of the patch-clamp amplifier, 16 measure points are added into the circuitry. All measure points are brought through an internal multiplexer to the dedicated ADC channel. Test signals from the dedicated DAC were injected into the circuitry channel at the four test points and analog switches set the point for the injection of test signal.

Dynamic model of headstage:
The headstage of patchclamp amplifier is a high-sensitive current-to-voltage converter. The simple way to measure small currents is to monitor the voltage drop across a large resistor. Fig. 2A shows the circuits of a resistive headstage. The operation amplifier A1 is configured as a current-tovoltage converter. A1 varies output to keep the pipette potential at V com . Differential amplifier A2 subtracts V cmd from the output of A1 to generate a voltage that is purely proportional to the voltage across R f [3] . Thereby, the desired current is obtained.
In order to increase the sensitivity, the value of feedback resistors is very large commonly. The PC3 headstages uses the resistors of 500 M (for whole cell mode) and 50 G (for single channel mode). Commercial resistors in this range have some inevitable parasitic capacitance, including the stray capacitance C f , distributed capacitance C d and input capacitance C g (Fig. 2B).
• The inherent bandwidth of a feedback resistor is limited by the stray capacitance C f . For example, the 50 G resistors with 0.1 pF (picofarad) stray capacitance has a time constant of 5 ms, corresponding to a bandwidth of about 32 Hz. The time resolution is very low, which is unacceptable for measuring the ionic currents • The distributed capacitance C d in the high-value resistors makes the headstage model more complex, because R f cannot be considered as an ideal capacitor C f in parallel with an ideal resistor. C d and R d will introduce a differential into the circuits • When a step voltage command is applied on the pipette, the current required to charge the input capacitance C g will easily exceed the maximum range that can be passed by R f . As a result, the patch clamp amplifier will be saturated. In order to compensate the charging current through C g , a special circuit (fast capacitance compensation circuits in stimulus and compensation channel of PC3) was developed to inject the required charging current. The circuit and method of C g compensation exceeds the scope of this paper and will not be discussed here In conclusion, the influence of parasitic capacitance across the high-value resistor can't be ignored. The dynamic model of headstage can be approximated to two poles and single zero in transfer function by experience and test. The response characteristics of the headstage are described by a transfer function Z(s), which can be used to give the response V(s) at the output of headstage for any input current I(s) Where s = jω, R f is the feedback resistor, τ 0 , τ m and τ p are the equivalent time constant of main pole, sec pole and zero in the headstage, respectively. τ z and τ p approximately represent characteristic in high frequency.
When R f is 500 M , τ m is about twenty times greater than τ z and τ p by experience, so the model can be simplified as a first order delay component [8] . Otherwise, τ m , τ z and τ p were in the same range (several ms) when R f is set as 50 G . Thus, the compensation of headstage that R f is 50 G is more difficult than that R f is set as 500 M . So, we here just discuss the automatic calibration method of the compensation system for the headstage that R f set as 50 G in detailed.

Compensation methods:
The headstage consists of a low-noise operational amplifier, analog switches, feedback resistors of 50 G , 500 M and currentinjection capacitors of 1 pF and 10 pF (Fig. 3). Because the headstage is physically small, the necessary gain and frequency compensation adjustments are implemented in the main unit of patch-clamp amplifier. Diagram of frequency compensation for the headstage was summarized in Fig. 3. The test signal from the dedicated test DAC channel is injected into the circuit at the test point (P in Fig. 3). An auto-zeroing test integrator is provided to allow currents to be injected through injection capacitors into the headstage to test the frequency response of the headstage. Then current-monitor signals of the headstage pass through transient response correction stage (correcting for distributed capacitances across the feedback resistors), filter1 (reducing the high-frequency noise) and high frequency booster (correcting the main pole introduced by the stray capacitance across the feedback resistors). To allow for automatic calibration of frequency compensation system, two measure points (M in Fig. 3) are intercalated for monitoring the output of transient response correction stage and high frequency booster.
Estimate dynamic model of headstage: Eq.1 can be rewritten as Where s = jω, R f is the feedback resistor. Because the headstage is approximate to a two-pole system, the parameters of elements b 0 , b 1 , a 1 , a 2 of Eq. 2 can be determined by the least squares parameter estimation algorithm [9] , as shown in Eq. 3.
The frequency response of the headstage was tested using swept frequency sine waveform stimulus signals. Because the bandwidth of 50 G is about 20 Hz, so we set the frequency of test sine signals as 10 Hz to 70 Hz with 5 Hz step. The amplitude was 2 V peak-to-peak. The stimulus signals pass through auto-zeroing test integrator and 1 pF current-injection capacitor and apply at the input of the headstage. The calibrated currents are 200 pA peak to peak. A procedure creates and analyzes the responses and stimulus signals using FFT. Forty cycles waveform of each frequency were act as a variable conductance. The C is 330 nF and R is 50 when the stage was set for compensating the 50 G headstage resistor delivered; the sec half of responses are averaged and the results are transformed to obtain the gain and phase at half cycle points. Then b 0 , b 1 , a 1 and a 2 can be obtained using the gain and the phase of all frequency test points and Eq. 3.

High frequency boost:
Two 12-bit mDACs D1, D2 (AD7564, Analog Devices) are used to set both gain and the time constant in the high frequency booster [5,6] , as shown in Fig. 4. The transfer function of high frequency booster is where D 1 , D 2 are the equivalent resistances of mDAC D1 and D2 respectively. D1 acts as a variable conductance to set the time constant of zero. D2 sets the overall gain by acting as the feedback resistor. For the equivalent resistance of D1 is far larger than R, the time constant of zero τ 0 in high frequency booster is approximate to D 1 C. The time constant of new pole of the stage is RC and far less than τ 0 . So, the bandwidth of new pole of high frequency stage is above 10 kHz, which is enough for measuring ionic currents.
The time constant of the main pole τ m of headstage can be cancelled exactly when τ 0 = τ m . Nevertheless, τ 0 is set to be equal to or a little larger than the calculated parameter τ m to ensure the enough compensation for the headstage. The residual error of step response after compensation is  where k 1 = -0.34 a 1 , k 2 = -0.34 a 2 .
The adjustment of the four parameters in Eq. 7 is performed as a least squares fitting problem. The two amplitude parameters have linear effects and optimum values can be computed using least-squares algorithm. Otherwise, the two time constant parameters have nonlinear effects and finding the optimum values was a difficult problem. The best approach to finding the optimum set of these two non-linear parameters was a search of their domains [7] . At each point in a grid of 20*20 values for 1 and 2 , a 1 and a 2 were determined and the residual error was predicted respectively.
The difference between step response of headstage after transient response correction and high frequency boosted and the idea value is where f 0 (n) is the step response of system when k 1 = k 2 = 0, M is the steady state value of f 0 ; f 1 (n) is the step responses of system when k 1 = 1, k 2 = 0; f 2 (n) is the step responses of system when k 1 = 0, k 2 = 1.
When the value of 1 and 2 is initialized, the optimization value of k 1 , k 2 can be obtained when In order to speed the search, actual step responses of the system were only measured under the condition that k 1 and k 2 were set to zero at first; the effect of nonzero amplitudes of these components was then computed numerically to quickly evaluates the step response. f 1 (n), f 2 (n) can be computed numerically by first-order recursive filter method.
When the transfer function of first-order filter is , the output f (n) can be numerically arithmetic estimates by the following [10] : where u(0) is the input of filter; T is the sample interval. Several candidates for the optimum values of the amplitude parameters and time constant parameters were obtained as the grid point yielding the smallest error. Every team of parameters is loaded into the corresponding mDACs and the response at the output of high frequency booster was measured when the scaled square-wave current injected. The best optimization of all four parameters was obtained by minimizing of the measured peak error after every team parameters were used to set mDACs in the circuits.
Gain scaling: D2 is used to set the gain of the frequency compensation system (Fig. 3). At final step, we adjusted D2 to scale the gain of the headstage. The scaled gain at the output of high frequency booster stage is 0.5 mV/pA (500 M ) or 50 mV/pA (50 G ). Gain scaling used an iterative search routine that based on a linear approximation (Newton-Raphson) method.
After high frequency compensation, transient response correction and gain scaling, all the parameters were stored in the file on the host computer and then used by the patch-clamp experimental software.

RESULTS
The method described in Estimate dynamic model of headstage was used to test the frequency characteristics of the headstage. The frequency response of headstage was shown in Fig. 6 and the dynamic parameters were obtained accordingly. The main time constant is about 8.88 ms, so the bandwidth of the headstage is about 20 Hz, which is too narrow for measuring ion channel currents. As shown in Fig. 7A, the high frequency portion of signal was attenuated when the step signal passed through the headstage. The test signal injected at the input of headstage had been scaled to 200 pA(-100.0 pA to 100.0 pA) by the autozeroing test integrator and 1 pF injection capacitor. And the test signal frequency was 25 Hz.
In order to completely compensate the main pole of the headstage, the time constant τ 0 of zero in highfrequency correction stage is a little larger than the estimated time constant of main pole of headstage. And the choice of τ 0 should ensure that the steady state of the step response is very flat and the overshot is as little as possible. As a consequence, τ 0 is set to be 8.90 ms. For the C for compensating 50 G is 330 nF, the effective resistance of mDAC (D1 in Fig. 4) should be about 27 k . D2 sets the overall gain by acting as the feedback element, so it should be initialized to a fixed value (2500 in our system) at first and rescaled at the final step.
The step response of system after high-frequency compensation was shown as Fig. 7B. Step response exhibited a serious overshot which was produced by the zero of headstage. The procedure estimated 1 , 2 and a 1 , a 2 using the least squares fitting method described in Transient response correction. The optimum value of 1 , 2 is estimated as 0.45 ms and 3.11 ms and the corresponding values of a 1 , a 2 as 0.15 and 0.69, respectively. The parameters are loaded into the appropriate mDACs (D1, D2, D3 and D4 in Fig. 5) and the responding signal was acquired by DAQ (shown in Fig. 7C). At the final step, we adjusted the code of D2 in Fig. 4 to ensure that the actual gain of the system is same to the designed value. The designed gain of the headstage is 50 mV/pA when a 50 G feedback resistor was used. The output of high-frequency booster is 10 V (peak to peak) after gain scaling, so the equivalent of current is 200 pA (-100 pA to 100 pA) (Fig. 7D).
We found that the simplified calibration method of the frequency compensation system can remarkably accelerate the system response (Fig. 7). The result data demonstrate that the extended bandwidth of headstage can reach above 6 kHz, which is about 300 times larger than the original value before compensation and is enough for measuring physiological signals. The residual error is less than 2% after transient response correction. Similar results were obtained in the experiments of replacing other two headstages.

DISCUSSION
The automatic calibration routine of frequency compensation system is of great interest for both manufacturer and users. First, the manual adjustment of frequency correction stage circuits in the conventional patch-clamp amplifier is difficult and time-consuming.
But for the new type amplifier, the manufacturer just needs perform the software routine to calibrate the frequency compensation system and save the results in host computer. The whole process for each of the two ranges takes about 3 min on personal computer.
Second, compensation results of the headstage are dependent on dynamic characteristics and manufacture crafts of the feedback resistors used. Since the noise level and dynamic characteristic cannot be predicted, various brands and several of resistors must be tested until the best one is founded in the conventional patchclamp amplifier, which is also a time-consuming process. The automatic calibration method makes the choice of resistors and adjustment of frequency compensation system much more efficient and simple than before.
Third, the necessary gain and frequency compensation adjustments must be made whenever the headstage is exchanged. In conventional patch-clamp amplifier, setups of frequency compensation system circuits were unchangeable for users after calibration and the patch-clamp main unit and headstage must send to the manufacturer for recalibrating it. The calibration results of the novel patch-clamp amplifier are saved in the computer, so the automatic calibration routine is valuable both for manufacture and user to recalibrated the main unit and save the results in host computer after replacing the headstage.

CONCLUSION
The automatic calibration of the frequency response of headstage is the most demanding portion of computer-controlled patch-clamp amplifier. Experimental results of demonstrate that the frequency compensation system calibrated by our automatic calibration method can reconstruct the signals pass through the headstage accurately and effectively.
The implement of complete digital control of patch-clamp amplifier has resulted in an instrument having some advantages. It's more convenient and easy to operation by mouse and keyboard than the knobs and switches of the conventional patch clamp amplifier. Further more, the software routines running on the computer can perform some functions to realize the automatic calibration, testing and adjustment and the routines perform their functions more quickly than the corresponding manual adjustment.