Empirical Analysis and Mathematical Representation of the Path Length Complexity in Binary Decision Diagrams

Information about the distribution of path-lengths in a Binary Decision Diagrams (BDDs) representing Boolean functions is useful in determining the speed of hardware and software implementations of the circuit represented by these Boolean functions. This study presents expressions produced from an empirical analysis of a representative collection of Boolean functions. The Average Path Length (APL) and the Shortest Path Length (SPL) have simple behavior as function of the number of variables and the number of terms used in the construction of the Sum of Products (SOPs) in Boolean expressions. We present a generic expression that is uniformly adaptable to each curve of path-length versus number of terms over all the empirical data. This expression makes it possible to estimate the performance characteristics of a circuit without building its BDD. This approach applies to any number of variables, number of terms, or variable ordering method.


INTRODUCTION
The use of logic verification and optimization algorithms in VLSI CAD systems requires efficient representation and manipulation of Boolean functions [1] . During the last two decades, BDDs have gained great popularity as successful method for the representation of Boolean functions [2,3] . The ever-increasing complexity of circuit designs is directly related to the complexity of parameters that describe the Boolean function. Over the years, the number of nodes in a BDD became a major concern since it is proportional to the complexity of the Boolean circuit [4] . Over the past two decades most of the problems in the synthesis, design and testing of combinational circuits, have been solved using various mathematical methods [5,6] . Researchers in this area are actively involved in developing mathematical models that predict the number of nodes in a BDD in order to predict the complexity of the design in terms of the time needed to optimize it and verify its logic.
Evaluation time is another crucial parameter of the circuit complexity and it is proportional to the path length of a BDD and one can use BDD structures to estimate the evaluation time of the logic function that represents a circuit [7,8] . Therefore, minimization of the path length can improve the complexity of the circuit implementing a Boolean function, which will eventually enhance the performance of the final implementation. In general the minimization of the path length in Decision Diagrams (DDs) is important in database structures, pattern recognition, logic simulation and software synthesis [7] . The methods proposed for the minimization of APL [7][8][9][10] reduces the average evaluation time of logic functions. Most of these methods are based on either Static variable ordering [11,12] or dynamic variable ordering techniques [13] . The minimization of APLs leads to circuits with smaller depth of paths from the root to the terminal node of the BDD. The resulting circuit will be optimized for speed on one hand and on the other hand the number of very long paths in the BDD will be reduced [14] . The minimization of APL is of great importance in real time operating system applications [10,15,16] . The minimization of the LPL (Longest Path Length) and SPL of a BDD can also reduce the evaluation time, which is very important for Pass Transistor Logic (PTL) [7,17,18] . One of the main problems with pass transistor networks is the presence of long paths: the delay of a chain of n pass transistors is proportional to n 2 . Inserting buffers can reduce the path length, but this increases the silicon area. So the minimization of the longest evaluation time will improve the performance of the circuit [7,[18][19][20] Analysis of the BDD methods revealed that the variable ordering in a given Boolean function plays an important role in minimizing the size of the BDD graph as well as minimizing the path length [19,10] . One must go through a number of simulations to find the suitable variable ordering that leads to the minimum size of the BDD and minimum Path Length. In this approach we need to create the whole BDD representing the Boolean function with the best possible variable ordering. Building the whole BDD may lead to some complexity in the design process in terms of the time required to implement, verify and test the design. It will be useful to have a kind of estimation of the BDD complexity prior to make decisions on the feasibility of the design [20] . For any combinational circuit the only available initial information is the Boolean function that represents this circuit and the number of its variables. This information is usually considered to design and verify circuits using well known mathematical methods. There has been a lot of research [21][22][23][24] done on the estimation of combinational and sequential circuit parameters from the exact Boolean function describing the circuit. What distinguishes this study and prior work [20,[25][26][27] by the some of the current authors is the use of stochastic technique and estimation of parameters from only partial information about the Boolean function.
It is very hard to perform a comparison without having an idea about the path length size for a given number of variables. Therefore, it is important to develop a mathematical model that predicts the path length, knowing the number of variables and the number of product terms of the Boolean function represented by this BDD.
The main objective of this study is to enhance the methodologies proposed in [20,25] to estimate the path length complexity for the Boolean functions represented by the BDD. First, we present experiments that show the behaviors of the APL and SPL and then we extract a unique mathematical model for produced experimental graphs. This study is organized as follows: First is an introduction, followed by the necessary terminologies and definitions of the BDD and path length. . Later we review the previous work done on the estimation of the BDD complexity. The proposed method with the experimental results followed by the mathematical model is given next. Finally the advantages of this mathematical model followed by an outline of our future developments in this research work and conclusion.

PRELIMINARIES
Basic definitions for BDDs and path length are given in [1,3,4,7,10] . In the following we review some of these definitions.

Definition 1:
A BDD is a directed acyclic graph (DAG). The graph has two sink nodes labeled 0 and 1 representing the Boolean functions 0 and 1. Each nonsink node is labeled with a Boolean variable v and has two out-edges labeled 1 (or then) and 0 (or else).
Each non-sink node represents the Boolean function corresponding to its edge "1" if v = 1, or the Boolean function corresponding to its edge "0" if v = 0. Definition 2: An Ordered BDD (OBDD) is a BDD in which each variable is encountered no more than once in any path and always in the same order along each path.

Definition 3:
A Reduced OBDD (ROBDD) is an OBDD which no nodes have equivalent behavior.
Variable ordering: The size of a BDD is largely affected and its variation can be linear or exponential depending on the choice of the variable ordering in building the BDD. Figure 1 illustrates the effect of the variable ordering [R.E. Bryant, 1986] on the size of BDDs for the Boolean function (1): i e ) denotes edge "0" (or the edge "1") directed from away node i V [7,8] . Since all paths include the root node, this node is traversed with probability 1.00. Since all assignments to values of variables are equally likely, we can use the following equation (2) to calculate the ) for the rest of the nodes: Definition 5: The APL is equal to the sum of the node traversing probabilities of the non-terminal nodes [7,10] . Node traversing probability denoted by is the fraction of all 2 n assignments of values to the variables whose path includes node i v . The APL can be expressed by the following equation (3): Where, N is the number of non-terminal nodes. Example: Consider the BDD graph shown in Fig. 2. In this example we will compute the APL and the SPL: Relation between the size of a boolean function and the ROBDD complexity [20] : The complexity of the ROBDD mainly depends on the number of nodes represented by the ROBDD. Analysis of the complexity variation in ROBDDs i.e. the relation between the number of product terms and the number of nodes for any number of variables is discussed in these works, the experimental graph variation reveals that the complexity of the ROBDD can be modeled mathematically by equation (4). Figure 3 indicates that the mathematical model represented by equation (4) provides a very good approximation of the ROBDD complexity. 1 ) ( (4) Where, NN is the number of nodes that represents the complexity of ROBDD, NPT is the number of nonrepeating product terms in the Boolean function,α , β and γ are three constants. Using curve fitting techniques, the variations of α, β and γ were mathematically modeled and represented by the following equations (5), (6) and (7).
Where, NV is the Number of Variables. Behavior of XOR/XNOR Min-term Representations [26] : In this work, the complexity variation in ROBDD for a specific group of XOR/XNOR min-terms is analyzed. A graph that represents the ROBDD complexity in terms of number of nodes with respect to the number XOR/XNOR minterms of the Boolean function is then plotted and the behavior of XOR/XNOR is modeled mathematically by equation (8): Figure 4 show that the mathematical model represented by equation (8) provides a good approximation of the experimental ROBDD complexity.
Where, NN is the number of nodes that represents the complexity of ROBDD, NXM is the number of XOR/XNOR min-terms in the Boolean function, β is 2n-2 with n the number of input variables and α = 0.605234.

ANALYSIS OF THE COMPLEXITY OF PATH LENGTH IN BDDS
Proposed method: An experiment was carried out using Colorado University Decision Diagram (CUDD) Package [28] to analyze the complexity variation of SPL with the number of product terms for any number of variables. For each variable count n between 1 and 14 inclusive and for each term count between 1 and 2 n -1, 100 Boolean functions were randomly generated and the APL and SPL average was determined by using CUDD package for specific variable ordering technique. This process was repeated until the average size of the APL and SPL complexities became 1. Then the experimental graphs for APL and SPL complexities were plotted against the product term count for each variable count. .

Fig. 4: Experimental/Equation ROBDD Complexity for XOR/XNOR Min-terms
Experimental analysis for APL and SPL complexity variations: Figure 5 and 6 illustrates the APL and SPL complexity relation for Boolean functions with product terms having n=10 variables using the Symmetric Sift reordering technique of the CUDD tool. The graph indicates that the complexity (i.e. size) of the path length in general (APL and SPL) increases as the number of product terms increases. This is clear from the rising edge of the curve shown in Fig. 5   This peak indicates the maximum APL and SPL that any Boolean function with 10 variables can produce independently of the number of product terms. Apart of that the peak also specifies the number of product terms (critical limit) of a Boolean function that leads to the maximum number of APL and SPL for any Boolean function with 10 variables. The number of product terms that leads to the maximum APL and SPL is 66 and 50 respectively. If the number of product terms increases above the critical limit, as expected, the product terms starts to simplify and the BDD will reduce, which will reduce both the path lengths (APL and SPL) size.
The APL and SPL complexity graphs shown in Fig. 5 and 6 indicate that as the number of product terms increases the complexity of the APL and SPL decreases in a slower rate and ultimately reaches 0. Figure 6 illustrates that the falling edge of the SPL graph behaves a bit different than the other complexity graphs shown in Fig 2 and 3, where the decrease is with a roll off, to be independent of the variable count. The APL complexity variation graph is fairly similar to the Fig. 2, but the roll of is not steeper as the Fig. 2. The location and height of the peak and the slope of the logarithm of the roll off varied. Reduction of the APL and SPL complexity to 0 implies that all the product terms simplify to logic 1. A simple algebraic expression for these curves was developed, unifying all the cases.

MATHEMATICAL MODEL FOR THE PATH LENGTH BEHAVIOR
Exponentials of rational polynomials fitted the data well; but, a theoretical precedent was not apparent. On the other hand, not only has the same basic behavior, but is also implicated in other complexity measures, such as Kolmogorov, Tichner, Shannon and Lempel-Zif complexity, as well as the density of the prime numbers. The generic SPL graph has an initial rise, two peaks and roll off to zero, suggesting the sum of two formulas, but with horizontal and vertical scaling and a little peak shaping. We note here that the second peak is not always a peak of the curve, but it is a peak of the difference between the curve and the best affine approximation in that region. The generic APL graph has an initial rise which is similar to SPL rise, but with only one peak and a roll off to 0. Analyzing all the above factors for the behavior of the APL and SPL graphs, the complexity behavior was modeled mathematically by the following equations: Where, t is the number of product terms in the Boolean function. The (mostly) constantsα and β parameters affect the shape of the peak.
It can be inferred from Fig. 6 that the curve has two peaks, which needs four scaling parameters to define the locations of the peaks (Fig. 7): i.e. 12 v ≥ . Eventually the following equation (11) was used in order to calculate the constant 2 β for APL. 2 ( 11.5) 2 The final behavior of the APL and SPL curve can be found by the following single equation (12): (12) In this mathematical model, the peaks ) , ( i i y x for both the APL and SPL curves were found by performing an empirical fit for each time. Figure 8 and 9 depict the experimental results obtained for APL and SPL using the CUDD package and the theoretical results obtained using equation (12). The mathematical model represented by equation (12) provides a very good estimation for the APL and SPL complexity behavior, where the experimental and equational results produced a match. Further verification of the mathematical model was done for Boolean functions with 2 to 15 variables. It can be inferred that the experimental and mathematical curves are following a similar pattern for any number of variables. Figure 10-13 illustrates the experimental and mathematical models for APL and SPL for variables 8 and 12 respectively.  the proposed mathematical model, which produces complexity estimation error for APL and SPL. It can be inferred that the mathematical expression was able to match the experimental curve with minimum error, which is less then 01 . 0 ± for most of the Product terms.
Effect of the reordering methods on path length complexity variations: The experiment done earlier using the Symmetric Sift CUDD reordering method was extended here to understand the relation of Symmetric Sift APL and SPL graphs with other reordering techniques. It was observed that the relation between the graphs follows the same pattern and it varies only on the amplitude factor of the curves. By analyzing the effect of the reordering methods on the model, equation (12) can be modified with an additional amplification factor (µ). The amplification factor is 1 for the Symmetric Sift, greater than 1 for methods with lower efficiency and less than 1 for methods with higher efficiency than the Symmetric Sift. Equation (13) represents the mathematical model for the APL and SPL for any reordering method.
The amplification factor was calculated and depicted in Table 1. Figure 16 shows the comparison graphs of the APL and SPL behaviors for Symmetric Sift with two of the other CUDD variable ordering techniques mainly the Genetic Algorithm and Window2. These two graphs show that the efficiency of the reordering method has a definite impact on the path length complexity; an efficient variables ordering leads to a reduced number of nodes, which leads to reduced path lengths.  (10), provides some useful information on the following, without the need of building the BDD. 1. The complexity behavior of the APL and SPL, given the number of product terms of the Boolean function 2. The number of product terms for which the maximum possible depth will occur. 3. The maximum complexity of the APL and SPL of Boolean functions for any number of variables.

CONCLUSION AND FUTURE WORK
Future work includes minimizing the Complexity estimation error of the match and to develop experiments to include larger number of variables. We are in the process of investigating an automated global fit for any SPL and APL curves in order to find the complexity for any number of product terms. Investigating a mathematical model for other BDD characteristics (i.e. longest path length and number of paths) is also considered.
We have discussed the idea of using BDD to study and model a relationship between the path lengths and the number of product terms in a Boolean function. Analyzing the Experimental results, we have introduced a single and unique mathematical model, which is based on an empirical fit that can predict valuable information related to the APL and SPL behaviors without building the BDD. A great reduction in time complexity for digital circuits' designs can be achieved and the model can also offer useful information on the design to handle the minimization of its evaluation time prior to its implementation. Our experimental results show good correlation between the experimental results and those given by the mathematical model.