EMBEDDED CONTROLLED MULTI LEVEL VOLTAGE SOURCE INVERTER BASED DISTRIBUTION STATICS SYNCHRONOUS COMPENSATOR

This study deals with the D-STATCOM used as a shunt co nected compensator for the voltage support. The DSTATCOM has a faster response as compared with the conventional compensators such as the synchronous condenser and the SVC. The D-STATCOM can provide vo ltage support and improve power quality. The DSTATCOM supplies reactive power to the load to impr ove the voltage stability of the load busses. In th is study two control strategies are performed using VSI fed STATCOM for reactive power compensation and power system bus voltage regulation. The fourteen bus sys tem with and without D-STATCOM are modeled and simulated. VSI fed STATCOM is modeled and simulated . The compensators are tested with different loads. The above facts have been verified by using simulation in MATLAB/SIMULINK environment on a five level VSI fed STATCOM under variations of load. The simulated r sults have been validated through experimental r esults on a five level VSI fed STATCOM and the experimenta l results are compared with the simulated results.


INTRODUCTION
The distribution system is facing increasing demand for more power, better quality with high reliability as well as low environmental impact. In order to achieve this, the power electronic equipment has been used and leading to several power quality problems. We are facing different power quality problems in distribution system are voltage sag, voltage swell, current harmonics, notch, spike, transients. The most severe power quality problem is voltage sag, which is affecting the industrial consumers. Voltage sag is defined as the decrease in the voltage level rms from 0.1 to 0.9 Pu with time interval. The common cause of voltage sag are increasing of faulty wiring, short circuits in the system and, starting of induction motors, this will lead to increase in both production and financial loss for industries and therefore it is necessary to mitigate the voltage sag. In distribution system there is also radial distribution in which loads are connected in different lengths short circuited at different points with different rating, this leads various in feeder impedance and increases losses in the distribution system (Rajasekaran et al., 2013).
The reactive power in the system can be compensated by using conventional methods such as synchronous condensers, fixed capacitors, inductors, or using power electronic switches based compensators such as TSC, TCR (Kumkratug, 2011a) the above mentioned reactive power compensating devices are having disadvantages like slow response, less flexibility, less accuracy of compensation, more cost, operating dependency on system voltage. The commercial availability of power electronics based switches with high power management capacity such as GTO thyristors, IGBTs. A second generation FACTS device, using key component as Voltage Source Inverter (VSI), has made important Science Publications AJAS impact in the field of reactive power compensation and is known as Static Synchronous Compensator (STATCOM). The STATCOM almost overcomes all the issues related with reactive power compensation and voltage regulation. One of the important merits of the STATCOM is that its operation does not depend on power system voltage (Tuncer and Dandil, 2008). For proper reactive power exchange with power system, the STATCOM output voltage needs to be controlled efficiently. Non linear contrrol of shunt FACTS for duty power oscillation is given by (Kumkratug, 2011b), Fuzy logic controlled SSSC is presented by (Padma and Rajaram 2011), Grid voltage stability enhansment using PV based SSSC is.

2.CONSTRUCTION AND OPERATION OF D-STATCOM
The essential STATCOM model consists of a voltage source inverter, DC side Capacitors (C) with voltage V dc on each capacitor and a coupling reactor (LC) or a transformer. The ac voltage difference across the coupling reactor produces reactive power exchange between the STATCOM and the power systems at the Point of Common Coupling (PCC). If the output voltage of the STATCOM (V C ) is more than the system Voltage (V L ) then reactive power is supplied to the power system and reverse happen if V C is less than that of V L . The output voltage of the STATCOM can be controlled in two ways either by changing the switching angles while maintaining the dc capacitor voltage at a constant level or by changing DC capacitor voltage at fixed switching angles (Kumkratug, 2011b). The charging and discharging of DC capacitor voltage is able by phase shifting of STATCOM voltage with respect to power system voltage. The configuration of the STATCOM is shown in Fig. 1.
The STATCOM can be classified into two categories: (i) multi-pulse type and (ii) multilevel type. In multipulse inverter topology, six-pulse inverter units are connected through a specially designed zigzag transformer to achieve high pulse inverter (i.e., 12, 24, 48-pulse) for better waveform and high power applications. The necessity of zigzag transformer which occupies more space and makes the configuration more complex is major demerit of it (Sivakumar and Parvathi, 2013). The alternative topology of STATCOM is based on multilevel inverters. The multilevel inverters are further classified as: Diode-clamped type, flying capacitors type and cascade or isolated series H-bridges type. The different multilevel inverter topologies have their own merits and demerits depending on the number of components requirement, applications, configuration, modularity cost, space requirement. Cascade Multilevel Inverter (CMLI) is considered most suitable topology for STATCOM for power systems voltage regulation applications (Chen et al., 1997;Yao and Xiao, 2013).

CASCADE MULTILEVEL INVERTER
The Cascade multilevel inverter consists of a number of H-bridge inverter units with separate DC source for each unit and is connected in cascade or series. In Fig. 2a two Hbridges (H1 and H2) are connected in cascade or series producing output voltage as shown in Fig. 2b. Each Hbridge can produce three different voltage levels: +Vdc, 0 and-Vdc by connecting the dc source to ac output side by different combinations of the four switches. The ac output of each H-bridge is connected in series such that the synthesized output voltage waveform is the sum of all of the individual H-bridge outputs (Yao and Xiao, 2013).
By connecting the sufficient number of H-bridges in cascade and using proper modulation scheme, a nearly sinusoidal output voltage waveform can be synthesized. The number of levels in the output phase voltage is 2s+1, where s is the number of H-bridges used per phase. The Fig. 2b shows five-level output phase voltage waveform using two H-bridges. The switching angles α1 and α2 are corresponding to H1 and H2 respectively while β1 = π-α1 and β2 = π-α2. In case of 11-level CMLI five Hbridges per phase are required and the magnitude of the ac output phase voltage is given by sum of output voltages due to each H-bridge.
Artificial neural network controller based distribution static compensator for voltage sag mitigation is given by (Rajasekaran et al., 2013), coordination of series and shunt flexible AC transmission system devices based voltage source converter for improving power system stability is given by (Kumkratug, 2011a). Evaluation of critical clearing time of power system equipped with a static synchronous compensator is given by (Kumkratug, 2011b), Particle swarm and neural network approach for fault clearing of multilevel inverters is given by (Sivakumar and Parvathi, 2013), A multilevel inverter for static Var generator applications is given by (Peng, 1999), Power quality analysis in 6 MW wind turbine using static synchronous compensator is given by (Valarmathi and Chilambuchelvan, 2012), Multilevel inverters: Asurvey of topologies, controls and applications is given by (Rodriguez et al., 2002) power converter systems is given by (Wu, 2004) transformer less static synchronous compensator employing a multi level inverter is given by (Hochgrat and Lasseter, 1997), control of single phase grid connected inverters with non linear loads is given by (Yao and Xiao, 2013) Static synchronous compensator is given by (Kumar, 2003).

SELECTION OF SWITCHING ANGLE
To make multilevel AC output voltage using different levels of DC inputs, the semiconductor devices must be switched on and off in such a way that desired fundamental voltage obtained is nearly sinusoidal i.e., having minimum harmonic distortions. Different switching techniques are available for computing switching angles for the semiconductor devices (Mayilvaganan et al., 2013). Generally, the fundamental frequency switching scheme is considered more suitable for power system applications. In fundamental frequency switching scheme the devices are turned on and off once in a cycle, thereby producing less switching losses. Generally, the switching angles at fundamental frequency are computed by solving a set of nonlinear equations known as Selective Harmonic Elimination (SHE) equations such that certain order harmonic components (generally lower order) are eliminated (Yao and Xiao, 2013;Singh and Arga, 2014). Alternatively, the switching angles can be calculated by using some optimization based technique so that Total Harmonic Distortion (THD) up to certain order (generally up to 49th order) is minimized instead of eliminating some individual harmonic components (Ramana et al., 2012).
The above literature does not deal with multilevel VSI based STATCOM. This study proposes multilevel inverter for the control of reactive power.

SIMULATION RESULTS
The fourteen bus system is considered for simulation studies. The circuit model of 14 bus system without D-STATCOM is shown in Fig. 3a. Each line is represented by series impedance model.  The shunt capacitance of the line is neglected, 14 bus system with voltage sag sown in Fig. 3b. The load voltage, real and reactive power at bus 2 are shown in Fig. 3c and 3d respectively. The voltage decreases due to the addition of the load.

AJAS
Fourteen bus systen is shown in Fig. 4a. MLI used in this system is shown in Fig. 4b. Output voltage of MLI is shown in Fig. 4c. Voltage across load 1 and load 2 is shown in Fig. 4d. The load voltage decreses due to the addition of extra load at t = 0.3 sec. The dip in voltage is due to the increase in the drop across line impedance. The voltage reaches normal valueat t = 0.4 sec due to the additiion of the STATCOM. The real and reactive powers are shown in Fig. 4e. FFT analysis is done and the spectrum is obtained as shown in Fig. 5. The THD is 7.2%. The increase in Real and Reactive Powers with STATCOM are summarized in Table 1.The increase in power is due to the inctrease in the voltage.

EXPERIMENTAL RESULTS
Experimental setup of D-STATCOM is constructed and is shown in Fig. 6a. In D-STATCOM power circuit, IGBTs are used to create Five-level cascade inverter. This inverter is connected to AC grid by a three-phase coupling inductance. Gate pulses for the inverter are generated using PIC. The rectifier voltage is shown in Fig. 6b. Switching pulse for M1 and M5 are sown in Fig. 6c inverter output voltage is sown in Fig. 6d. The harmonic contents in the inverter output voltage can be reduced. This concept can be extended to 64 bus system.

CONCLUSION
Fourteen bus system is modeled and simulated using MATLAB SIMULINK and the results are presented. The simulation results of 14 bus system with and without D-STATCOM are presented. Voltage stability is improved by using D-STATCOM. This system has improved reliability and power quality. The simulation results are in line with the predictions. The scope of present work is the modeling and simulation of fourteen bus system. The simulation and experimental verification of the VSI fed STATCOM system have been presented. The system configuration and operating principle of the VSI fed STATCOM have been discussed. The experimental results match with the simulation results. The limitation of this system with single STATCOM is that it can improve the voltages of the buses nearer to the STATCOM. Additional STATCOMs are required to improve the voltage of the other buses.

Scope for Future Work
This study deals with simulation of fourteen bus system. Thirty bus and sixty four bus systems can be simulated in future. The hardware may be implemented using DSP processor.