Design of Capacitance to Voltage Converter for Capacitive Sensor Transducer

Problem statement: The design of Capacitance to Voltage Converter (CVC ) for capacitive sensor transducer was presented. The pro posed design will reduce the size, power consumption and supply voltage of the circuit and c an be used in high frequency band transducer. Approach: The design was implemented using the Operational am plifier (Op amp) and capacitive network. The circuit was simulated using the PSPICE model parameters based on standard 0.13 μm CMOS process. Results: The design was able to measure a wide range of capa cit nce variations for the capacitive transducer. The performance analysis of the design showed desirable performance parameters in terms of response, low power consumpt ion and a linear output voltage within the wide range of capacitive transducer capacitance variatio n for the power supply voltage of 1.2 V was achieved. Conclusion/Recommendations: The output voltage of the circuit varied linearly w ith the variation of capacitive transducer capacitance vari ation. The improved converter was compact and robust for integration into capacitive measuring sy stems and suitable for use in environment that making use of higher frequency band.


INTRODUCTION
Sensor transducers are widely used in the instrument measurement systems such as in the biomedical, automotives, telecommunications, food industry, water treatment plants and chemistry industry. The sensor itself can be defined as a device that can measure (or detect) changes in physical stimulus parameter (such as acoustic pressure, electrical or magnetic field changes, optical, thermal and mechanical) and turns the detected change or measured stimulus parameter signal into a recordable signal or pulse. On the other hand transducers are devices that convert a form of an input energy into a same or another form of output energy. There are many research has been done on the sensor transducers using the capacitance to frequency conversion for the past few years. The sensor transducer is suitably used for converting pressure variations (Takahata and Gianchandani, 2008), humidity measurements (DeHennis and Wise, 2005) into corresponding signal with equivalent frequency. Further, such transducers have been used in water level measurement system or even telemetry systems (Mariun et al., 2006;Reverter et al., 2007).
Various methods have been reported (Lotters et al., 1999;Alia, 2007;Zahirul Alam et al., 2009;Ghafar-Zadeh et al., 2009;Arfah et al., 2010;Chatzandroulis et al., 2000) to deal with capacitance to voltage conversion. Some of them, for instance the method utilizing ratioarm bridge is symmetrical and sensitive, but it has the disadvantage that transformer coils have to be used which is difficult to implement monolithically. Others, for example the modified Martin oscillator with microcontroller is not capable of handling capacitance changes with frequencies higher than 10 Hz. Another approach is based on charge integration (Lotters et al., 1999). It is less susceptible to parasitic; however, a fairly large feedback resistor is usually needed to bias the sensing electrode. In the past, the large resistor can be implemented either by sub-threshold transistors or long transistors in triode region (Geen et al., 2002). However, values of such MOS (Maiti and Maiti, 2010) resistors depend on the terminal voltages which are difficult to control. For pressure sensor applications, since the capacitance and output voltage of the CVC change over a wide range, the linearity of the feedback resistor degrades seriously. Besides, a large transistor will introduce parasitic capacitance which would cause signal attenuation in a capacitive sensing front-end. In this study the capacitance to voltage converter circuit is designed based on third generation Berkeley Short-channel Insulated Gate FET (IGFET) Model 3 (BSIM3) version 3.2 of 0.13 µm technology and performance of the design is presented.
Proposed ADC architecture: The Capacitance to Voltage Converter (CVC) circuit is designed by using the Operational amplifier (Op amp) by considering the offset voltage of the Op amp and the charge injection error of a switch. The schematic diagram of the CVC circuit is shown in Fig. 1. C x is the capacitor of the detected sensor and C R and C F are the designed capacitors. V R1 is the common-mode voltage and V R2 is the reference voltage. The signals ck1 and ck 2 are two non overlapping phase clocks. When the signal ck 2 is logic high, the voltage V R2 will charge the capacitor C x , whereas the capacitor C F stores the offset voltage of the Op amp. When the signal ck 1 is logic high, the capacitor C F is connected to the output. The voltage V R2 charges the capacitor C R . Thus, by following the principle of charge conservation, the output voltage V o will be derived as follows: Therefore: ( ) where, V os is the offset voltage of the Op amp and the output voltage is free from Op amp offset as observed in Eq. 2.

The
Op amp plays an important role in designing the converter. Therefore the Op amp is designed based on 0.13 µm CMOS technology. Therefore: It is observed from Eq. 5 that the gain of Op amp should be high so that the output voltage V O is insensitive of the Op amp gain as mentioned in Eq. 2. The unity gain bandwidth and phase margin of the Op amp need to be considered for stable response and frequency range of operation.
The proposed CVC circuit has been simulated using the model parameters of a standard 0.13 µm CMOS process. The width for the CMOS devices are chosen based on designed equations (Allen and Holberg, 2002;Ali and Khamis, 2005;Nabhan and Abdallah, 2010). The supply voltage of the Op amp is chosen ±1.2V for reducing power consumption.

RESULTS AND DISCUSSION
The voltage transfer a characteristic of the Op amp is shown in Fig. 3. Figure 4 shows the frequency response of the Op amp. The bandwidth gain is approximately 1.8 MHz.
The detection capacitance C X is varied from 20-1700 fF with the increment of 20 fF. Capacitance C R and C F are set to 1 and 1500 fF respectively for this capacitance range. The output voltage waveform with the variation of capacitance, C X of the circuit is shown in Fig. 5. The peak output voltage from the Fig. 5 is plotted in Fig. 6 with the variation of C x . The Fig. 6 shows that the output voltage varies linearly with the variation of C x . The operational amplifier differential gain, Ad = 29.948 dB or 31.43 V/V and the 3-dB frequency, f -3 dB = 57.597 kHz. Thus, this value of A d is close to the estimated using the large signal differential transfer characteristic. The phase margin is 92.8° which is more than 60° for stable operation without ringing. The overall performance of the Op amp is tabulated in Table 1.  The value of capacitive transducer, C x is chosen from 20-1700fF, then any changes of capacitance of the capacitive transducer results linear output voltage within the range of 0.02-0.59V for the variation of the capacitance from 100-1640fF, respectively. The output voltage can be obtained by using following equation: where, C x in fF and V o in Volts. It is note that the Eq. 6 is valid for the circuit with C R = 1 fF and C F = 1500 fF. However, by changing the value of C R and C F , other ranges of capacitive transducer can be used. If order to design a circuit that can be detect capacitive transducer capacitance changes within pF range then C R and C F are to be chosen in pF range with appropriate ratio.

CONCLUSION
A capacitance measuring systems for sensor transducer was designed in this study is suitable for low voltage applications for less than ±1.2 V. It is observed that the output voltage is linearly varies with the variation of capacitive transducer capacitance within a wide range. Based on these advantages, it is also suitable to be implemented in the pressure, humidity and other sensors applications since it changes over a wide range. The circuit is implementing a short channel technology device that will not only reduce the parasitic capacitance introduced by the transistors but also will benefit to high speed system sensing implementing in lower scale device. The improved converter is compact and robust for integration into capacitive measuring systems and suitable for use in environment that making use of higher frequency band.

ACKNOWLEDGMENT
This study is funded by the Research Management Center, International Islamic University Malaysia through Endowment fund.