A Low Cost Design Solution-DSP Based Active Power Factor Corrector for SMPS/ UPS( Single Phase)

As per international agency regulation (IEC 1000-3-2/EN 61000-3-2) and market expectation, it is important to reduce current harmonics in the AC line current drawn by SMPS/ UPS connected to AC Mains as source and also it is desired by the user to deliver maximum power output by achieving unity power factor. To achieve the above objectives in SMPS/ UPS, APFC is required to be implemented as front end power interface between SMPS/UPS and AC Mains source. This study explores low cost design solution – DSP based APFC for Industry involved in manufacturing/supply of SMPS/UPS.


INTRODUCTION
Single phase SMPS/UPS are widely used in commercial, residential and many other applications due to advantages in efficiency and smaller size. Typical SMPS is commonly built with un-controlled bridge rectifier with a filter capacitor providing a narrow pulse current that contains significant amount of harmonics polluting utility [1] and making input power factor low which is against international agency regulation and also it is in-efficient. For that matter typical single phase UPS is built with Thyristor controlled bridge as front end which permits to control DC voltage. However this measure increases the control complexity and its use leads to additional generation of reactive power.
As an alternative /improvement to existing front end converter of SMPS/UPS, APFC can be used. Traditionally APFC is designed and implemented in Industry using Analog PFC controller ICs [2,3] due to cost and ready available from various manufacturers.
Analog control, however possess some drawbacks. The number of parts required in the PFC control circuit and their susceptibility to ageing and environmental variations, is an issue. This also lead to high cost maintenance. Further analog control once designed is inflexible and performance can not be optimized for various utility distortions.
At the same time, there are design solutions available to implement APFC using Digital controller or DSP controller [4][5][6][7] . FPGA based PFC controller [5] is very costly due to multiple ICs/components like ADC etc., high frequency sampling warranting costly testing/measuring/ development tools for design validation and making magnetics design critical. DSP based PFC controller implementation adopted [4,6] is occupying more resources of DSP controller warranting another DSP or Microcontroller required for front end Interface for local control and system integration with computer for remote control which is costly and limit cycle problem faced during testing/ verification requiring filter circuit/sampling care. Dual mode, Hybrid SMR controller adopted [7] is PC based , not economical. In view of these, this study explores the possibility for a low cost digital design solution using a low end DSP TMS320LF2403 for inner current mode controller and PWM control IC UC3845 for outer voltage mode controller. This study also proposes application of PFC using DSP.
Moreover a digital/DSP controller PFC provides advantages such as programmability, less susceptibility to environmental variations and fewer parts count and the complex current control contained with in the software and enabling system integration with computer for system management.

PFC Rectifier and its characteristics
* The harmonics in AC line current is actively minimized. * Active power delivered to load is high. * Output DC voltage is regulated and independent of AC Mains fluctuations. * Only a few and small passive devices are required for implementation. * No EMI/EMC compatibility problem and can be used for telecommunication/computer application.
Working principle, topology in APFC: Most commonly used APFC topology namely is a single switch Boost converter. A simplified schematic of a single switch APFC is shown in Fig. 1. Assume that by a suitable starting control strategy a DC side voltage Vo (which should be greater than the maximum of AC line i.e. Vm for proper operation of this converter) has been created. Now if the Switch 'S' is kept on the current in the Inductor increases from whatever it was at the instant of switch closure. Hence it is possible to increase the current in 'L' by closing the switch. And if the switch 'S' is opened, whatever current that was flowing in the Inductor at the instant of opening the switch will force itself into Capacitor 'C' through diode 'D' since current in Inductor can not be broken instantaneously in a system which is devoid of Impulse voltages. But then if 'D' conducts across 'L' changes polarity (because Vo is assumed to be more than Vm) hence current in it decreases from its initial value. Thus it is possible to increase current in 'L' by closing 'S' and to decrease the current in 'L' by opening the switch 'S'. If it is possible to raise or lower the inductor current, track a pre-specified wave shape by controlling Switch on/off.
Using this strategy the current in L in this converter is made to follow a full wave rectified wave shape. If the current in L is full wave rectified in shape the line current in the AC side will be pure sinusoidal and in phase with supply voltage due to the modulation process involved in the controlled rectifier. This is the principle of operation of Boost type single phase PFC circuit. The boost converter is operating in continuous conduction mode (CCM).The dynamic elements in the converter are L and C. The dynamic variables in the converter are I L and V c = V o . So, the dynamic and output equations are written as in [8] given below: 1

Boost converter design, analysis and mathematical model description:
Because of the PFC operation, there exists an unbalance of Instantaneous power between the input power, which is time varying and DC output power. Therefore PFC involves processing input power in certain way that it stores the excessive input energy when the input power is larger than DC output power and releases the stored energy when the input power is less than DC output power. To accomplish this a capacitor 'C' is introduced as a reservoir in APFC to take care of Dc load demand / load fluctuations..
To smoothen the variations in charge and discharge current in the capacitor, the inductor 'L' is introduced in APFC after bridge rectifier. That means inductor and capacitor whose role is to smooth out the inherent pulsating behaviour originating from the switching action. (1) Since in the steady state, the initial and final values of Inductor current must be equal. Removal of finite (nonzero) proportionality constant 'L' in (1) results in general criterian for the steady state, the so-called voltsecond balance on the Inductor, as: V L dt = 0 volt-second balance on the Inductor (2) or for the two switched intervals, where α nearly = R L/ R (7) By use of this result, since efficiency is alternatively η= V O I / V i I L, the voltage gain becomes: As seen in Fig. 5 the voltage gain DC gain now correctly exhibits a maximum value over the Duty ratio D range. Also the efficiency is seen to decrease significantly for higher duty ratio.

Fig.4 Boost converter characteristics waveforms
Two level controller design: The Two level controller design is adopted here. The voltage mode controller senses APFC out put voltage, increases the Inductor current from the AC line if out put voltage tends to decrease from the set value V O (specified voltage) and decreases the current from the AC line when the output voltage tends to increase. The current mode controller sees the Inductor current has the desired wave shape as the voltage waveform and the amplitude as commanded by voltage mode controller. Now we shall see how the PWM (switch ON/OFF time) can be designed to achieve the controller objectives. We operate the circuit under current mode control and, to make the reference current (instantaneous value of Inductor current) equals instantaneously desired sine wave current. This approach leads to Input current to APFC that approximated to a rectified sinusoid in phase with voltage. Now, V i = V m sin πt/T L  Where V m = Amplitude of AC line, T L = frequency of AC line.
If the circuit operates properly and PF=1, there must exist a linear relationship in each switching cycle between the average value of Inductor current and Input voltage, I L = g i V i and analogously between the low frequency components, these quantities I n (t) = g i v i (t) (1) Here g i denotes the proportionality factor being the input conductance of the circuit (valid for low frequency components). The proportionality factor gi is varied one cycle to other i.e. every T L second (line period) so as to regulate output voltage V o around specified value. For a steady state operation, g i must be constant independent of the considered cycle.
The waveform I ref (t) is similar to ramp function of classical PWM switching mode converter, but the amplitude is adjustable and is controlled by v c (t). Thus the switch current can be compared with I ref (t) so that dT s will be determined in accordance with the above relationship.
As shown in (7), I ref (t) is derived from the product of feed back controller input v c (t) which gives the control action (g i V o ) in steady state, and a standard ramp function v ramp (t) that generates a function of (1-dT s ) is called PWM of the switch. Also it is known that Inductor current to follow sine wave voltage V i in phase at start of line half cycle, Zero crossing detector (ZCD) is used to detect current reference start point. Input voltage variations and Dc load variations are considered as disturbance input of APFC. Hence APFC controller is to regulate output voltage and track inductor current in phase with AC Mains through PWM switching for any step change in the disturbance.

CONTROLLER DESIGN IMPLEMENTATION
Hardware: The complete schematic diagram of proposed a DSP based APFC is presented in Fig. 6. The voltage mode controller is implemented with IC3845 and current mode controller can be implemented through DSP. The modular construction of PCBs in this design makes easy serviceability. There are three signals as listed below, required to be sampled by DSP for current controller design.
Voltage controller output is the amplitude command required to maintain Output voltage of the APFC, received from IC3845 (pin6) as pulse width connected through opto-isolator to the capture unit of DSP (pin 4) as input. This is updated at every zero crossing point of Rectifier output. That means the voltage controller output is kept constant at that particular cycle of Rectifier output (V i ).The voltage controller output is used of previous cycle.
Inductor Current is sensed through Hall effect sensor (HES) connected to analog conditioning unit then to ADC input of DSP (Pin No 18).
By sampling rising mono shot pulse ,zero crossing point is detected .The mono pulse is generated from Rectified output connected to zero crossing detector and mono pulse detector through a control voltage transformer. Figure 6.a and Fig 6.b are shown laboratory prototype voltage mode controller with power circuit and DSP based hardware for current mode controller implementation respectively.

Software:
The software required for current mode controller module (main module required for PFC) implementation consists of series of sub module programs performing individual tasks. These submodules are linked together under the control of a main program to perform as complete system. The modular program makes the software more manageable and portable.
Based on the functionality, the main current mode controller can be divided into two parts. The first part is the DSP initialization, which includes register, interrupt and subroutine Initialization. These tasks are done once the program starts.
Upon completion of initialization, the program waits for interrupt calls while performing infinite loop. The initialization routine flow diagram is shown in Fig.  6.2.
The other part of the software is the interrupt service routine. These routines are called when a specific event (timer period) occurred, as set in the initialization process. When an interrupt occurs, the main program breaks the infinite loop and goes to the proper interrupt service routine that has been designated to the particular event. Upon finishing the routine, the program continues the infinite loop waits for the next interrupt call. Current controller algorithm is to be implemented is shown in Fig. 7. The software interrupt routine flows are shown as in Fig. 8 For improvement, the saved resources of DSP can be utilized to control DC/DC converter (for SMPS) and DC/AC converter (for UPS) plus front-end manmachine interface (for SMPS/UPS) and to integrate the converter with Computer as system for monitoring its status in a limited cost. Also voltage mode controller and zero crossing point detection can be implemented with DSP itself later.
Therefore APFC in a reduced hardware to minimum, increases the reliability, hence the cost by achieving high Input power factor and reduced Input current harmonics.