TY  - JOUR
AU  - Bilami, Azeddine 
AU  - Lalam, Mustapha 
AU  - Benmohammed, Mohamed 
PY  - 2005
TI  - Design and Simulation of an Input Queuing Packet Switch
JF  - Journal of Computer Science
VL  - 1
IS  - 3
DO  - 10.3844/jcssp.2005.296.303
UR  - https://thescipub.com/abstract/jcssp.2005.296.303
AB  - Many Architectures of Internet routers, ATM and Ethernet switches have been proposed and
analysed in literature. Theoretically reliable and valid solutions have been developed to achieve high
performances, but a lot of them are not feasible in practice for commercial and technological reasons.
Few papers develop the implementation and simulation aspects. The objective of this study is the
design of a packet switch with a minimum cost and hardware complexity. We propose an input-queuing
architecture using a multistage interconnection network and a simple cell selection policy
implemented by hardware. The switch is described and simulated using a VHDL language.
Performances in terms of throughput and cell loss are evaluated.