TY  - JOUR
AU  - Timarchi, Somayeh 
AU  - Kavehei, Omid 
AU  - Navi, Keivan 
PY  - 2008
TI  - Low Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number System
JF  - American Journal of Applied Sciences
VL  - 5
IS  - 4
DO  - 10.3844/ajassp.2008.312.319
UR  - https://thescipub.com/abstract/ajassp.2008.312.319
AB  - Modulo 2n +1 adders find great applicability in several applications including RNS implementations. This paper presents a new number system called Carry Save Diminished-one for modulo 2n+1 addition and a novel addition algorithm for its operands. In this paper, we also present a novel architectures for designing modulo 2n+1 adders, based on parallel-prefix carry computation units. CMOS implementations reveal the superiority of the resulting adders against previously reported solutions in terms of implementation area and delay.