Journal of Computer Science

Comparative Power Analysis of Precomputation Based Content Addressable Memory

M. Arun and A. Krishnan

DOI : 10.3844/jcssp.2011.471.474

Journal of Computer Science

Volume 7, Issue 4

Pages 471-474

Abstract

Problem statement: In this study we discus about Signature Detection Technique (SDT) used in Network Intrusion Detection System (NIDS). Design of SDT using Content Addressable Memory (CAM) is discussed. Approach: Two novel architectures, XOR and ones count based Pre computation CAM architectures are proposed and implemented in third party back end tool with 0.18 mm technology, power consumptions are compared. Results: Proposed architecture consumes 90% less power added with 5.2% increment in speed. Conclusion: Power reduction was achieved by reducing the number of bit comparisons of pre computation technique.

Copyright

© 2011 M. Arun and A. Krishnan. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.