Research Article Open Access

Optimization of Test Scheduling and Test Access for ITC-02 SOC Benchmark Circuits

P. Sakthivel, R. Delhi Babu and P. Narayanasamy

Abstract

Problem statement: This study presented the optimized test scheduling and test access for ITC-02 SOC benchmark circuits using genetic algorithm. In the scheduling procedure of SOC, scheduling problem was formulated as a sequence of two problems and solved. Approach: Test access mechanism width was partitioned into two and three partitions and the applications of test vectors and test vector assignments for different partitions were scheduled using different operators of genetic algorithm. Results: The test application time was calculated in terms of CPU time cycles for two and three partitions of twelve ITC-02 SOC benchmark circuits and the results were compared with the integer linear programming approach. Conclusion: The results showed that the genetic algorithm based approach gives better results.

Journal of Computer Science
Volume 5 No. 4, 2009, 290-296

DOI: https://doi.org/10.3844/jcssp.2009.290.296

Submitted On: 13 March 2009 Published On: 30 April 2009

How to Cite: Sakthivel, P., Babu, R. D. & Narayanasamy, P. (2009). Optimization of Test Scheduling and Test Access for ITC-02 SOC Benchmark Circuits . Journal of Computer Science, 5(4), 290-296. https://doi.org/10.3844/jcssp.2009.290.296

  • 3,223 Views
  • 2,622 Downloads
  • 0 Citations

Download

Keywords

  • System-on-chip
  • test scheduling
  • test access mechanism
  • integer linear programming
  • genetic algorithm
  • test wrapper