American Journal of Applied Sciences

Design of Field Programmable Gate Array Based Emulators for Motor Control Applications

Ahmed Ben Achballah, Slim Ben Othman and Slim Ben Saoud

DOI : 10.3844/ajassp.2012.1166.1181

American Journal of Applied Sciences

Volume 9, Issue 8

Pages 1166-1181

Abstract

Problem statement: Field Programmable Gate Array (FPGA) circuits play a significant role in major recent embedded process control designs. However, exploiting these platforms requires deep hardware conception skills and remains an important time consuming stage in a design flow. High Level Synthesis technique avoids this bottleneck and increases design productivity as witnessed by industry specialists. Approach: This study proposes to apply this technique for the conception and implementation of a Real Time Direct Current Machine (RTDCM) emulator for an embedded control application. Results: Several FPGA-based configuration scenarios are studied. A series of tests including design and timing-precision analysis were conducted to discuss and validate the obtained hardware architectures. Conclusion/Recommendations: The proposed methodology has accelerated the design time besides it has provided an extra time to refine the hardware core of the DCM emulator. The high level synthesis technique can be applied to the control field especially to test with low cost and short delays newest algorithms and motor models.

Copyright

© 2012 Ahmed Ben Achballah, Slim Ben Othman and Slim Ben Saoud. This is an open access article distributed under the terms of the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.